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ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Due 12:15 PM Friday, December 12, 2014 Introduction and Background Signal processing systems, in particular communications systems, need to generate signals in addition to processing them. Text Chapter 5, entitled Signal Generation, drills down on this important topic. Signal generation requirements might be for sinusoids, pulse type signals, pseudo-random data, or noise waveforms, to name a few. In this lab the focus will be on the generation of sinusoidal signals using what is known as direct digital synthesis (DDS) [1]–[3]. A application case study is described in Part II, which is a communications receiver for frequency modulation (FM). The FM receiver implements complex frequency translation of the input signal in order for demodulation to be performed at complex baseband. Part I: Direct Digital Synthesis The text describes two means of sinusoidal signal generation: (1) direct digital synthesizer (DDS) and (2) the digital resonator. The digital resonator uses an IIR filter with poles located on the unit circle that is excited by impulse to start the oscillation. The focus here is the DDS technique, as it is quite popular in communications transmitter and receivers. The Voltage Controlled Oscillator as Motivation The DDS is motivated by the voltage controlled oscillator (VCO), which is used as sinusoidal signal generator in analog electronics [1]. A VCO has output frequency, f i ( t ) , that is proportional to the input control voltage, e ( t ) plus the quiescent frequency f 0 .Working from the VCO block diagram of Figure 1, you have t φ ( t ) = 2πK v –∞ VCO (1) x ( t ) = A cos [ 2πf 0 t + φ ( t ) ] e(t) e ( λ ) dλ θ(t) Figure 1: VCO high level block diagram. with VCO gain constant K v having units of Hz/v.The total phase of the VCO output, θ ( t ) , is related to the instantaneous frequency of the VCO as ECE 4680 DSP Laboratory 6: Signal Generation Using DDS 1 d f i ( t ) = ------ θ ( t ) = f 0 + K v e ( t ) 2π d t (2) where f 0 is the VCO quiescent frequency. From the above equations you can now draw the behavioral level block diagram of Figure 2. θ(t) 1 --s 2πK v cos ( ) x(t) e(t) bias term { 2πf 0 integrator Figure 2: VCO behavioral level block diagram. Note when e ( t ) = 0 the instantaneous frequency becomes f i ( t ) = f 0 Hz. Converting the VCO Model to the Discrete-Time Domain In the discrete-time domain consider a sampling rate of f s = 1 ⁄ T , with T being the sampling period or spacing. You have x [ n ] = x ( nT ) = cos [ 2πf 0 nT + φ ( nT ) ] , (3) where the discrete-time phase is φ [ n ] = φ ( nT ) .The integrator is replaced by an accumulator when you consider approximating the integral via rectangular areas. This is shown in Figure 3. a(t) a ( ( n – 1 )T ) a( t) b ( nT ) = T 1 --s n–1 b(t) a ( kT ) ( n – 2 )T k = –∞ ( n – 1 )T t nT Figure 3: Discrete-time integration approximation using the left endpoint for a. With the integration above understanding you can write φ [ n ] = φ ( nT ) = 2πK v T n–1 e ( nT ) k = –∞ = 2πK v T n–1 (4) e [ n ] = kv e [ n – 1 ] + φ [ n – 1 ] k = –∞ where k v = 2πK v T rad/sample. The recursive form for φ [ n ] in the last line of (4) motivates the discrete-time form of the VCO shown in Figure 4. Part I: Direct Digital Synthesis 2 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS e[n] ω̂ 0 ⋅ n + φ [ n ] θ[n] –1 z cos ( ) kv 2πf 0 T bias term ω̂ 0 = 2πf ⁄ f 0 s phase accumulator x[n] Can make output a mod(2π) value due to cos( ) Figure 4: Discrete-time VCO block diagram. ˆ = 2πf ⁄ f to the desired quiescent As a fixed frequency generator let e [ n ] = 0 and set f 0 or ω 0 0 s frequency 0 < f 0 < f s ⁄ 2 . This behavior is similar to the analog VCO. Note the discrete-time VCO is sometimes referred to as a numerically controlled oscillator (NCO), but more typically is the idealized mathematical form of the DDS. The output equation for the NCO/DDS when e [ n ] = 0 is x [ n ] = cos ( 2πf 0 ⁄ f s ⋅ n ) = cos ( ω̂ 0 n ) (5) where you can also write that θ [ n ] = ω̂ 0 n θ [ n + 1 ] = ω̂ 0 ( n + 1 ) = ω̂ 0 n + ω̂ 0 = θ [ n ] + ω̂ 0 (6) C-Code Implementation Using Floats On the OMAP-L138 a near ideal DDS implementation is possible since float-point arithmetic is available and the math.h library can be used to for on-the-fly calculation of sine and cosine using sinf() and cosf(). The code snippets below produce an example of how this can be done: #include <math.h> // added for trig function support // DDS variables #define two_pi 6.283185307179586 float f0 = 1000; // desired DDS quiescent frequency float theta = 0; float w0 = 0.130899693899575; //2*pi*1000/48000, use GEL to compute more vals ... interrupt void Codec_ISR() { ... // DDS codecOutLeft = 32000*cosf(theta); theta += w0; if (theta >= two_pi) theta -= two_pi; // wrap accumulator output ///////////////////////////////////////////////// Part I: Direct Digital Synthesis 3 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS ... } From the above code snippet you see that the DDS quiescent frequency is determined by choosing f0 ω̂ 0 = 2π ⋅ ----, 0 < f 0 < f s ⁄ 2 fs (7) Practical Implementation Considerations Most DDS implementations, in particular ASIC and FPGA forms, utilize fixed-point arithmetic. Finite precision impacts include • Bit width of the accumulator; controls the ultimate frequency precision or smallest freB quency step size via Δf = f s ⁄ 2 acc Hz, where f s is the sampling rate and B acc is the accumulator bit width • The size of the sine/cosine look-up-table (LUT); the bit width here is typically reduced from the accumulator bit width, that is B w < B acc , this the table contains at most 2 B w entries • The storage precision or bit width of the sine/cosine values: B cos A modified DDS block diagram, that includes finite precision attributes is shown in Figure 5. For B acc z Input ΔN –1 Bw Q( ) B cos sin/cos LUT Output B w < B acc Bacc bit phase accumulator Figure 5: Finite precision DDS block diagram. an accumulator input step size ΔN (an integer value), the DDS output frequency is fs - ⋅ ΔN Hz f 0 = --------B 2 acc (8) or from a design standpoint B acc f0 ⋅ 2 ΔN = -----------------. fs (9) Note in [3] and elsewhere f s is referred to as the DDS clock frequency, f clk . A MATLAB simulation of this system is the following: function [x,a_out,n] = DDS(f0,fs,N_samps,Bcos,Bacc,Bw) % [x,a_out,n] = DDS(f0,fs,N_samps,Bcos,Bacc,Bw) % //////////////// Inputs //////////////////// Part I: Direct Digital Synthesis 4 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS % f0 = desired output frquency % fs = sampling frequency % N_samps = number of samples to simulate % Bcos = bit width of cos/sin values % Bacc = bit width of the accumulator % Bw = bit width of the LUT address % //////////////// Outputs /////////////////// % x = output signal % a_out = accumulator normalized to a [0,1) float value % n = time index % % Mark Wickert November 2013 n = [0:N_samps-1]; x = zeros(1,N_samps); a_out = zeros(1,N_samps); a = 0; w = 0; theta = 0; for k=1:N_samps %x(k) = cos(2*pi*a); x(k) = simpleQuant(cos(2*pi*w/2^Bw),Bcos,1,'none'); a = a + round(f0/fs*2^Bacc); if a >= 2^Bacc a = a - 2^Bacc; end w = round(a/2^(Bacc-Bw)); a_out(k) = w/2^Bw; end To see the DDS simulation in action suppose f s = 48 kHz and consider 32 bits (very large) for all of the bit widths and compare that to the case B acc = 32, B w = 12 and B cos = 14 : >> [x,a_out,n] = DDS(14,48,2^16,32,32,32); >> simpleSA(x,2^14,48,-120,5,1); >> [x,a_out,n] = DDS(14,48,2^16,14,32,32); >> simpleSA(x,2^14,48,-120,5,1); >> plot(n(1:50),a_out(1:50)) >> hold Current plot held >> plot(n(1:50),a_out(1:50),'r.') The idealized result (32 bits everywhere) is shown in Figure 6 and the reduced bit width results are shown in Figure 7. As the bit width is reduced spurious outputs (spurs) start to appear. This is a result of the finite precision arithmetic involved in the design. Part I: Direct Digital Synthesis 5 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Normalized Power Spectrum in dB 0 −20 −40 −60 −80 −100 −120 0 5 10 15 Frequency (kHz) 20 Figure 6: DDS output at 14 kHz for f s = 48 kHz and 32-bits in three locations. Normalized Power Spectrum in dB 0 −20 −40 −60 spurious outputs −80 spurious outputs −100 −120 0 5 10 15 Frequency (kHz) 20 Figure 7: DDS output at 14 kHz for f s = 48 kHz, B acc = 32, B w = 12 , and B cos = 14 . Further discussion of DDS spurs can be found in the appendix of this document. Part I: Direct Digital Synthesis 6 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS The 32-bit accumulator output for f 0 = 14 kHz and f s = 48 kHz is shown in Figure 8. 1 Normalized Accumulator Output 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 Sample Index n 35 40 45 50 Figure 8: DDS accumulator output for f 0 = 14 kHz for f s = 48 kHz, B acc = 32, B w = 12 , and B cos = 14 . What to Expect in Your OMAP-L138 Implementation When you implement the DDS using floats on the OMAP-L138 you will obtain results similar to Part I: Direct Digital Synthesis 7 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS those shown in. Exponential averaging reveals spurs spaced every 1 kHz About 88 dB About 78 dB to the noise spurious-free floor dynamic range (SFDR) Figure 9: DDS output at 1 kHz from the OMAP-L138 with f s = 48 kHz using real-time floats. Part II: FM Communications Receiver To put the DDS of Part I to good use, you now explore a communications receiver utilizing complex frequency translation. The sine and cosine signals of a DDS form a complex sinusoid that is used to complex frequency translate the input/received signal from 30 kHz to baseband ( f = 0 ). Demodulation is then performed on the now complex signal to recover the message signal. Receiving System Details The signal of interest is a frequency modulated (FM) carrier waveform given by Part II: FM Communications Receiver 8 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS t x c ( t ) = A c cos 2πf c t + 2πf d m ( λ ) dλ . (10) You study this waveform in detail in ECE 4625/5620, Communications Systems I. The signal carrier of center frequency is f c Hz. The information or message carried by the signal is m ( t ) . The message signal can be analog voice or music, or a digitally encoded information. The approximate frequency spectrum is shown in Figure 10. Mathematically the spectrum of x c ( t ) takes the form BFM controlled by m(t) –fc fc 0 f Figure 10: Spectrum of FM carrier centered at f c Hz. 1 X c ( f ) = --- [ X BB ( f – f c ) + X BB ( f + f c ) ] 2 (11) where X BB ( f ) is the complex baseband spectrum corresponding to x c ( t ) . Note x BB ( t ) is really just t x BB ( t ) = A c exp 2πf d m ( λ ) dλ . (12) To get your hands on x BB ( t ) all you need to do is complex frequency translate (10) either to he left or right by f c Hz and lowpass filter to one half the FM RF bandwidth, B FM ± j2πf c t x BB ( t ) = LP x c ( t ) ⋅ e . (13) I will later chose to make the translation frequency negative to move the spectrum to the left. If in doubt, recall from Fourier transform theory that FT { x ( t )e j2πf 0 t } = X ( f – f0 ) (14) where X ( f ) = FT { x ( t ) } . The second step is to demodulate the message m ( t ) from x BB ( t ) . In communication systems you learn that a frequency discriminator of some sort is required. Here I will use a DSP implementation fits well with the overall receiver architecture. DSP Receiver Implementation A DSP based receiver utilizing the capabilities of the Zoom OMAP-L138 board is shown in Fig- Part II: FM Communications Receiver 9 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS xc ( t ) 1 1 2 ADC xc [ n ] f s = 96 kHz x[n] (LEFT) 1 2 IIR LPF N=4 c s e – j2π ( 30 ⁄ 96 )n = e = complex 1 z(t) DAC (LEFT) 1 choose re{} DAC (RIGHT) test point or im{} options f s = 96 kHz – j2π ( f ⁄ f )n = real Complex 1 Baseband y [ n ] Discrimin. z [ n ] 2 Figure 11: Zoom (also LCDK) OMAP-L138 FM receiver block diagram. ure 11. The main signal flow passes from put to output using the left audio channel. The sampling rate is set to 96 ksps, which is the fastest rate supported by the audio codec. Since the complex frequency translation is performed on the sampled input signal, x c [ n ] , there are a some differences due to spectral images. Consider Figure 12 to help visualize how sampling followed by complex frequency translation and a lowpass filter achieves the intended result. Xc ( e Spectrum Before j2πf ⁄ f s f s = 96 kHz f c = 30 kHz ) ... ... (a) -66 -96 -48 Spectrum After (b) 0 -30 X( e ... j ( 2πf ) ⁄ f s 30 move left 30 kHz ) -60 -48 -30 0 36 f (kHz) 96 Important image for the LPF to suppress ideal lowpass -96 66 48 48 66 ... f (kHz) 96 Principle alias band Figure 12: The x c ( t ) spectrum (a) following sampling and (b) following frequency translation when f s = 96 kHz and f c = 30 kHz (shift left). Note that the spectrum of a complex signal is not symmetrical (in magnitude) about f = 0 . Communications applications of real-time DSP typically involve complex signals. Complex Baseband Discriminator The complex baseband signal y [ n ] for the case of an FM input signal, is of the form y [ n ] = Ac e jφ [ n ] = A c { cos ( φ [ n ] ) + j sin ( φ [ n ] ) } = y I [ n ] + jy Q [ n ] . (15) –1 Note φ [ n ] = tan ( x Q [ n ] ⁄ x I [ n ] ) . The frequency discriminator seeks to find the derivative of the phase φ [ n ] . In the continuous-time domain the derivative of the inverse tangent function is Part II: FM Communications Receiver 10 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS y I ( t )y Q' ( t ) – y Q ( t )y I' ( t ) dφ ( t ) z ( t ) = ------------- = --------------------------------------------------------. 2 2 dt y (t) + y (t) I (16) Q A discrete-time approximation to the above derivative is yI [ n ] ⋅ ( yQ [ n ] – yQ [ n – 1 ] ) – yQ [ n ] ⋅ ( yI [ n ] – yI [ n – 1 ] ) z [ n ] = --------------------------------------------------------------------------------------------------------------------------------------. 2 2 yI [ n ] + yQ [ n ] (17) Here the denominator of (17) can be omitted since the magnitude squared of the FM signal is a constant. MATLAB Simulation To verify the receiver design before writing and C-code, I construct a MATLAB simulation and drive the input with a real FM signal. The message signal will be a 1 kHz sinusoid deviating the 30 kHz carrier by about 1.5 kHz peak. To generate an FM signal you can use a modified version of the DDS m-code, FM_gen.m: function [x,a_out] = FM_gen(e,f0,fs) % [x,a_out] = FM_gen(e,f0,fs) % % Mark Wickert November 2013 x = zeros(size(e)); a_out = zeros(size(e)); a = 0; w = 0; theta = 0; for k=1:length(e) x(k) = cos(2*pi*a); a = a + f0/fs + e(k)/fs; a = mod(a,1); a_out(k) = a; end The complex baseband discriminator is implemented in the function discrim.m: function disdata = discrim(x) % function disdata = discrimf(x) % x is the received signal in complex baseband form % Mark Wickert X=real(x); % Y=imag(x); % N=length(x);% b=[1 -1]; % a=[1 0]; X is the real part of the received signal Y is the imaginary part of the received signal N is the length of X and Y filter coefficients for discrete derivative Part II: FM Communications Receiver 11 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS derY=filter(b,a,Y); % derivative of Y, derX=filter(b,a,X); % derivative of X, disdata=(X.*derY-Y.*derX)./(X.^2+Y.^2); The function DDS.m is used to generate a complex sinusoid for frequency translation and the function butter() us used to generate the lowpass filter coefficients. The complete simulation is as follows: >> >> >> >> >> >> >> >> [x,a_out,n] = DDS(30,96,10000,32,32,32); % Use a_out to form both cos & sin cpx_car = cos(2*pi*a_out) - j*sin(2*pi*a_out); % form exp[-j*2*pi*30/96*n] e = 2000*cos(2*pi*1000/96000*n); % The 1 KHz message signal, 2 kHz peak dev xc = FM_gen(e,30000,96000); % The 30 kHz FM carrier x = xc.*cpx_car; % The complex frequency translated signal [b,a] = butter(4,2*10/96); % The 4th-order lowpass filter with fc = 10 kHz y = filter(b,a,x); % The filtered complex signal, also complex z = discrim(y); % The discriminator output { S xc ( f ) } dB PSD (dB) The input spectrum, the frequency translated spectrum, and the filtered spectrum are shown as subplots in Figure 13. 20 0 −20 −40 { S x ( f ) } dB PSD (dB) (a) 20 0 −20 −40 { S y ( f ) } dB (c) PSD (dB) (b) 20 0 −20 −40 received signal 0 5 10 15 20 25 30 Frequency (Hz) desired spectrum peak dev. of 2 kHz 35 40 45 image spectrum −40 −30 −20 −10 0 10 Frequency (Hz) 20 30 40 −40 −30 −20 −10 0 10 Frequency (Hz) 20 30 40 Figure 13: The spectra at (a) the input, (b) following complex frequency translations, and (c) after the lowpass filter, in the MATLAB simulation of the FM receiver. Part II: FM Communications Receiver 12 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS The final discriminator output signal z [ n ] is given in Figure 13. 0.2 Filter transient Discriminator Output Amplitude 0.15 The 1kHz message sinusoid 0.1 0.05 0 −0.05 −0.1 −0.15 0 1 2 3 Time (ms) 4 5 6 Figure 14: The 1 kHz message signal recovered at the output of the discriminator in the MATLAB simulation. All is well, so now the system can be implemented on the Zoom OMAP-L138 with confidence. OMAP-L138 Sample Outputs A complete implementation on the OMAP-L138 is tested using the Analog Discovery for the FM signal source and the scope and spectrum analysis capabilities. An FM signal with a sinusoidal message at 1 kHz and 30 kHz carrier is configured as shown in Figure 15. Part II: FM Communications Receiver 13 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Figure 15: Setting up the function generator in Analog Explorer to produce an FM carrier at 30 kHz with a 1 kHz sinusoidal message at peak deviation of 0.05 x 30 kHz = 1.5 kHz. The signal captured at the output of the complex baseband discriminator is shown in Figure 16. The spectrum is also shown so that you can see that the 4th-order lowpass filter has not completely removed the image signal at 36 kHz. The image signal in fact manages to make its way through the discriminator. Part II: FM Communications Receiver 14 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Recovered 1 kHz sinusoid from 30 kHz FM carrier about 55 dB down message harmonics (2 & 3 kHz) 1 kHz message 36 kHz leakage Figure 16: OMAP-L138 output for a 1 kHz sinusoidal message at 1.5 kHz peak frequency deviation and f s = 96 kHz. Expectations When completed, submit a lab report which documents code you have written and a summary of your results. Screen shots from the scope and any other instruments and software tools should be included as well. I expect lab demos of certain experiments to confirm that you are obtaining the expected results and knowledge of the tools and instruments. The ZIP package Lab6.zip, explained in the appendix, contains m-code simulation functions and a CCS project entitled Zoom_DDS. Problems 1. Implement the DDS code described at the bottom of p. 3 on the OMAP-L138. Choose the sampling frequency to be 48 kHz. Modify this code so that you can control the output frequency of the sinusoids (cos/sin) via a GEL slider to step from 1 Hz to 20 kHz in 1 Hz steps. The GEL file can implement float calculations, so you can have the slider select the desired sinusoid frequency in Hz and have the GEL convert the value to a float ω̂ 0 = 2πf 0 ⁄ f s . Expectations 15 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS I will ask you to demo this via the spectrum analyzer (Agilent 4395A in spectrum analyzer mode). Note that sinf()/cosf() is used instead of sin()/cos(), what is the difference in the context of ANSI C? 2. Experimentally find the ISR service time of the simple DDS of Problem 1 using the digital I/ O technique first described in Lab 4. Initially assume no optimization then try -o3 optimization and note the improvement. 3. In Problem 1 the basic DDS calculation is of the form ADC_output = (short) 32000*cosf(theta); An efficient DDS uses a LUT in place of this on-the-fly cosine calculation. In this problem, rather than implementing an actual LUT, you will emulate one by doing some fixed-point conversions in the argument of cosf(). To start with note that the 32000 scales the cosf() value to lie near the max amplitude range of a short signed integer (recall [32768, 32767]). The only fixed-point quantization that is taking place presently is casting the cosine values from float to short as they are output to the audio codec (specifically the DAC). To emulate the LUT consider a rework of the original code to set up a float accumulator running from [0, 1), but quantized in the argument of cosf(). The code below increments the accumulator a by 0 < f 0 ⁄ f s < 1 (in code f0_fs), for f 0 ⁄ f s = 1000 ⁄ 48000 . The argument of cosf() is 2π ⋅ Q W ( f 0 ⁄ f s ) , where Q W ( ) is a W bit quantizer implemented as W Q W ( x ) = Short [ x ⋅ 2 ] ⋅ 2 –W . (18) Note Short[ ] represents casting a float value to a Short integer. The returned float value of –W (18) is again float because 2 is represented as a float constant. The returned value is however quantized. The modified DDS c-code is given below: ... // DDS variables #define two_pi 6.283185307179586 #define W 16 float a = 0; float f0_fs = 0.020833333333333; // f0/fs = 1000/48000 ... interrupt void Codec_ISR() { /* add any local variables here */ WriteDigitalOutputs(1); // Write to GPIO J15, pin 6; begin ISR timing pulse float codecInLeft, codecInRight, codecOutLeft, codecOutRight; float a_scale_p = pow(2,W); // emulate a table size of 2^W entries float a_scale_m = pow(2,-W); // using these scaling constants short a_short; if(CheckForOverrun())// overrun error occurred (i.e. halted DSP) return; // so serial port is reset to recover Problems 16 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS CodecDataIn.UINT = ReadCodecData();// get input data samples /* add your code starting here */ codecInLeft = CodecDataIn.Channel[ LEFT]; codecInRight = CodecDataIn.Channel[ RIGHT]; codecOutRight = codecInRight; // This input channel will not be used ///////////////////////////////////////////////// // DDS a_short = (short)(a*a_scale_p+ 0.5); codecOutLeft = 32000*cosf(two_pi*a_short*a_scale_m); a += f0_fs; if (a >= 1) a -= 1.0; ///////////////////////////////////////////////// CodecDataOut.Channel[ LEFT] = (short) codecOutLeft; CodecDataOut.Channel[RIGHT] = (short) codecOutRight; /* end your code here */ WriteCodecData(CodecDataOut.UINT);// send output data to port WriteDigitalOutputs(0); // Write to GPIO J15, pin 6; end ISR timing pulse } a) Using the spectrum analyzer mode of the Agilent 4395A, characterize the spectrum quality of the 1 kHz output signal for W=16. The quantity of interest is the spurious free dynamic range (SFDR) as shown in Figure 9. The SFDR measures the maximum dynamic range between the signal of interest and any adjacent spurs. The ISRs code DDS_ISRs_p3.c has the frequency set to 1 kHz. Keep that setting for all measurements. b) Repeat part (a) for W=12. 4. In this problem you will explore the FM receiver design of Part II. As an FM signal source you will use the internal FM capability of the Agilent 33250 function generator found on your lab bench. You lab instructor will you with the set-up of the generator. a) Write C code to implement the FM receiver described in Figure 11. As a starting point find the file FM_Demod_ISRs.c as the starting point. b) Configure the Agilent 33250 to produce a sinusoidal FM signal having f c = 30 kHz, a modulation frequency of 1 kHz, and a peak frequency deviation in the range of 1 to 2 kHz. c) Experiment with mistuning the frequency of the DDS relative to the known FM signal carrier at 30 kHz. How far above and below 30 kHz can you tune the DDS without resulting in a heavily distorted demodulated 1 kHz sinusoid? Problems 17 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS References [1] Michael Rice, Digital Communications: A Discrete-Time Approach, Prentice Hall, New Jersey, 2009. [2] Analog Devices MT-85 Tutorial, Fundamentals of Direct Digital Synthesis (DDS), 2009, http://www.analog.com/static/imported-files/tutorials/MT085.pdf. [3] Xilinx LogiCore, DS246 Product Specification v5.0, April 28, 2005. http:// www.xilinx.com/support/documentation/ip_documentation/dds.pdf. Appendix Dealing with Spurs Spurs are a known fact of DDS implementations. Design techniques to mitigate spurs are described in [1],[2], and [3]. The root cause of spurs is the fact that the quantizer Q ( ) introduces phase error δθ [ n ] = θ̂ [ n ] – θ [ n ] . (19) The accumulator output driving the LUTs is of the form θ̂ [ n ] = θ [ n ] + δθ [ n ] . In the generation of a complex sinusoid (sin and cos), i.e., e can write e ˆ jθ [ n ] = e = e jθ [ n ] ⋅e j δθ [ n ] jθ [ n ] ⋅ { 1 + j δθ [ n ] } = e jθ [ n ] (20) ˆ jθ [ n ] = cos ( θ̂ [ n ] ) + j sin ( θ̂ [ n ] ) , you { cos ( δθ [ n ] ) + j sin ( δθ [ n ] ) } (21) assuming the error is small. The error phase is also a periodic ramp signal so it effectively modujθ [ n ] lates θ [ n ] via the term j δθ [ n ]e . This action produces sidebands at frequency offsets from the fundamental frequency (4 kHz in the case of Figure 7). One mitigation approach is to inject a small random dithering signal at the input to the quantizer as shown in Figure 17. The idea is that the dithering signal disrupts the periodicity and replaces it References 18 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS with a dominant random phase error [1]. The corresponding error spectrum is transformed from B acc Input ΔN z –1 Q( ) θ[n] Bacc bit phase accumulator Bw B acc dither signal d[ n] θ̂ [ n ] B cos sin/cos LUT Output B w < B acc pseudo-random sequence toggling one or more LSBs Figure 17: Finite precision DDS with dithering to mitigate spurs. spectral lines to a flat noise-like spectrum across the entire spectrum. The spectrum now has a noise floor, but the spurs are gone and/or reduced. A MATLAB model that includes dithering is function [x,a_out,n] = DDS_dither(f0,fs,N_samps,Bcos,Bacc,Bw) % [x,a_out,n] = DDS_dither(f0,fs,N_samps,Bcos,Bacc,Bw) % % Mark Wickert November 2013 n = [0:N_samps-1]; x = zeros(1,N_samps); a_out = zeros(1,N_samps); a = 0; w = 0; theta = 0; for k=1:N_samps %x(k) = cos(2*pi*a); x(k) = simpleQuant(cos(2*pi*w/2^Bw),Bcos,1,'none'); a = a + round(f0/fs*2^Bacc); if a >= 2^Bacc a = a - 2^Bacc; end a = a + randn(1,1)*2^(Bacc - Bw - 3); % Dithering added here w = round(a/2^(Bacc-Bw)); a_out(k) = w/2^Bw; end A MATLAB model that includes dithering is 19 ECE 4680 DSP Laboratory 6: Signal Generation Using DDS Reworking the results of Figure 6, you now have the results shown in Figure 18. Normalized Power Spectrum in dB 0 −20 −40 Phase noise added around the carrier Noise floor −60 −80 −100 −120 no dither 0 5 10 15 Frequency (kHz) 20 Figure 18: DDS output at 14 kHz for f s = 48 kHz, B acc = 32, B w = 12 , and B cos = 14 with (red) and without (blue) dithering. LAB 6 ZIP Contents The file Lab6.zip contins MATLAB simulation code and the CCS project Zoom_DDS. The simulation code is discussed earlier in this lab document. In the CCS project shown in Figure 19 I make use of the CCS feature exclude from build to effectively turn on and off ISR files. Use the CCS exclude from build feature to toggle ISRs files on and off in the project. Use DSP_Config.h Presently excluded to change the sampling rate. from build Active DDS ISR that is incomplete for Problem 1 Use this file to change between 48 and 96 kHz sampling rates Gel file for DDS frequency tuning at fs = 48 and 98 kHz Figure 19: Contents of CCS project Zoom _DDS. A MATLAB model that includes dithering is ISR Omitted from ZIP Complete ISR for Problem 3 ISR Omitted from ZIP Incomplete ISR for Problem 4 20